Virtual instruction set machine (Virtual machine)

Overview

This is a prototype of a complete virtual machine. The goal of this virtual machine is to be used as a portable debug environment when developing high-level language applications. The design was made ,so that a hardware implementation of the virtual machine (in VHDL, or Verilog) is also possible. It is a simple RISC like architecture, with 32 registers, divided into special registers, general purpose registers, and floating point registers.

The virtual machine is separated in several different parts : The instruction interpreter, developped as a library, which is entirely coded in portable C (It will work on any system which support the basic POSIX-1990 C interface), the binary utils (bnuutils) which consist of the assembler (as), linker (ld), and object file dumper (objdump). All of these utilities are coded in pascal. Finally, a debugger is in the works (also coded in pascal).

A call through the operating system is done via the syscall opcode, which is then translated to a POSIX call by the code interpreter.

License

Currently this product is completely freeware, this may change in a future version.

Planned features

• Stabs debugger support

• Native loader for interpreter (e.g : the bytecode would be linked with a native loader, so as to avoid using an external program to execute the virtual machine instructions).

• Implement native shared library calls (the design is done, but the implementation is not).

• The current version is still early development stages, e-mail me to get access to the source code.

Specifications

The specifications to the virtual machine can be downloaded here.